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Astera Labs

Senior/Staff System Validation Engineer

Astera Labs · Haifa District, Israel

Posted about 2 months ago

or apply directly on Astera Labs's site. We never take the application ourselves.

Is this posting real?

This role has been open
54 days
Astera Labs's roles stay open a median of 55 days
Reposted
No
Salary listed
No
43% of Astera Labs's roles list one
Ghost-job risk at Astera Labs
high
133 stale, 8 reposted of 160 open
Hiring momentum
218 roles opened in the last 90 days
↑ up vs. the prior 90 days
Last confirmed on the employer's board
2026-09-27

Measured from postings appearing on and disappearing from Astera Labs's own greenhouse board since 2026-08-03. Full hiring picture for Astera Labs.

About this role

As a System Validation Engineer at Astera Labs in Haifa, you will be responsible for performing system validation on advanced semiconductor devices. This includes defining validation strategies, developing tools, and ensuring the performance and reliability of chips used in AI applications. You will work closely with experienced engineers in a new R&D center, contributing to the development of solutions that address data bottlenecks in AI infrastructure.

Our read on this posting2.0out of 5
benefits
1/5
freshness
1/5
career value
4/5
role clarity
4/5
pay transparency
0/5

Scored from the posting itself — how clearly the role is described, how much it says about pay and benefits, and how recently it was listed. Not a judgement of Astera Labs as an employer.

What you need

  • Strong academic and technical background in electrical or computer engineering
  • 3-5 years experience validating and/or developing complex SoC/silicon products for Networking and/or Server & Storage applications
  • Hands-on, thorough knowledge of high-speed protocols like Ethernet CXL, PCIe, NVMe
  • Silicon/System bring-up, validation, and debug experience, including customer’s systems
  • A Python coding experience
  • Familiarity with validation techniques C, C++

Nice to have

  • Familiarity with devices trees and related debugging techniques
  • Familiarity with board system design
  • C/C++ for embedded FW and device drivers
  • Basic understanding of x86/ARM architecture, UEFI/Linux boot sequence
  • Familiarity with CXL compliance standards and ability to follow and be involved in compliance consortiums

Worth weighing

  • No salary listed
  • Position is part of a new R&D center, which may involve initial uncertainty in processes and team dynamics
  • Emphasis on creativity and innovation may require adaptability in a fast-paced environment

Summarised from Astera Labs's posting. Read the full original.

Listed by Astera Labs on their greenhouse job board, last confirmed open on 2026-09-27. PitchMeAI is not the employer.

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