Astera Labs

Senior Emulation Engineer

Astera Labs · Israel

Posted about 3 months ago

or apply directly on Astera Labs's site. We never take the application ourselves.

Is this posting real?

This role has been open
87 days
Astera Labs's roles stay open a median of 87 days
Reposted
No
Salary listed
No
43% of Astera Labs's roles list one
Ghost-job risk at Astera Labs
high
160 stale, 8 reposted of 160 open
Hiring momentum
218 roles opened in the last 90 days
↑ up vs. the prior 90 days
Last confirmed on the employer's board
2026-10-29

Measured from postings appearing on and disappearing from Astera Labs's own greenhouse board since 2026-08-03. Full hiring picture for Astera Labs.

About this role

As a Senior Emulation Engineer at Astera Labs, you will lead the implementation of emulation strategies for semiconductor chips that support AI infrastructure. Your role involves executing end-to-end emulation flows, debugging complex system-level scenarios, and collaborating with cross-functional teams to ensure hardware-software integration. This position offers the chance to significantly influence the development of cutting-edge technologies in a new R&D center in Israel.

Our read on this posting2.4out of 5
benefits
1/5
freshness
1/5
career value
5/5
role clarity
5/5
pay transparency
0/5

Scored from the posting itself — how clearly the role is described, how much it says about pay and benefits, and how recently it was listed. Not a judgement of Astera Labs as an employer.

What you need

  • Bachelor's degree in Electrical Engineering, Computer Engineering, or related technical field
  • 3+ years of hands-on experience in Emulation at semiconductor companies
  • Deep expertise in emulation flows for large-scale chips using industry-standard emulators (Zebu, Palladium, or Veloce)
  • Strong background in SystemVerilog for developing, testing, and debugging complex SoC designs
  • Experience developing and maintaining execution flows for building, running, and debugging emulation models
  • 'Can-do' approach with ability to own technical blocks and drive them to completion independently

Nice to have

  • Master's degree in Electrical Engineering, Computer Engineering, or related field
  • Familiarity with EDA tools for Lint, Clock Domain Crossing (CDC), simulation, and synthesis
  • Proficiency in scripting languages such as Python or TCL for automation and flow enhancement
  • Experience with standard debug environments (e.g., Verdi)
  • Knowledge of high-speed interface protocols (PCIe, Ethernet, CXL, UALink)

Worth weighing

  • No salary listed
  • Opportunity to build a new engineering team from the ground up
  • Focus on complex technical challenges in a high-stakes environment

Summarised from Astera Labs's posting. Read the full original.

Listed by Astera Labs on their greenhouse job board, last confirmed open on 2026-10-29. PitchMeAI is not the employer.

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