PitchMeAI Jobs
Astera Labs

Principal Silicon Validation Engineer

Astera Labs · San Jose, California, United States

Posted about 3 months ago

or apply directly on Astera Labs's site. We never take the application ourselves.

Is this posting real?

This role has been open
87 days
Astera Labs's roles stay open a median of 87 days
Reposted
No
Salary listed
No
43% of Astera Labs's roles list one
Ghost-job risk at Astera Labs
high
160 stale, 8 reposted of 160 open
Hiring momentum
218 roles opened in the last 90 days
↑ up vs. the prior 90 days
Last confirmed on the employer's board
2026-10-29

Measured from postings appearing on and disappearing from Astera Labs's own greenhouse board since 2026-08-03. Full hiring picture for Astera Labs.

About this role

The Principal Silicon Validation Engineer at Astera Labs will focus on developing and executing electrical validation tests for silicon products, ensuring they meet performance and compliance standards. This role involves defining validation plans, automating testing processes, analyzing results, and collaborating with internal teams to ensure robust designs for AI and ML connectivity solutions.

Our read on this posting2.0out of 5
benefits
1/5
freshness
1/5
career value
4/5
role clarity
4/5
pay transparency
0/5

Scored from the posting itself — how clearly the role is described, how much it says about pay and benefits, and how recently it was listed. Not a judgement of Astera Labs as an employer.

What you need

  • Bachelor’s degree in Electrical or Computer Engineering (Master’s preferred)
  • ≥10 years experience with complex SoC/silicon products for Server, Storage, and/or Networking applications
  • Experience with debug and bring-up of complicated SoCs with high-speed interfaces such as PCIe/802.3 Ethernet
  • Strong problem-solving skills and ability to work independently
  • Basic knowledge of high-speed design blocks such as PLLs, CTLE, DFE, Tx EQ, PAM4 signaling
  • Strong python scripting and coding ability

Nice to have

  • Experience in system testing, characterization, margin analysis, and optimization of high-speed data links
  • Familiarity with PCIe or Ethernet Electrical Compliance sections
  • Hands-on experience with signal integrity related to PCIe/Ethernet testing
  • Working knowledge of C or C++ for embedded firmware
  • Familiarity with IEEE 802.3x Ethernet standards and signaling

What you get

  • Base salary range of USD $205,000 - USD $260,000

Worth weighing

  • No specific details on additional benefits or perks provided
  • The role requires a high level of independence and problem-solving, which may not suit everyone
  • The focus on high-speed interfaces may imply a fast-paced and demanding work environment

Summarised from Astera Labs's posting. Read the full original.

Listed by Astera Labs on their greenhouse job board, last confirmed open on 2026-10-29. PitchMeAI is not the employer.

More roles at Astera Labs

All 160 open roles at Astera Labs →

Apply to a Principal Silicon Validation Engineer position at Astera Labs - Jobs near me at San Jose, California, United States