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Astera Labs

Principal Product Application Engineer - Leo

Astera Labs · San Jose, California, United States

Posted about 2 months ago · $175,000 – $230,000

or apply directly on Astera Labs's site. We never take the application ourselves.

Is this posting real?

This role has been open
66 days
Astera Labs's roles stay open a median of 66 days
Reposted
No
Salary listed
Yes
43% of Astera Labs's roles list one
Ghost-job risk at Astera Labs
high
141 stale, 8 reposted of 160 open
Hiring momentum
218 roles opened in the last 90 days
↑ up vs. the prior 90 days
Last confirmed on the employer's board
2026-10-08

Measured from postings appearing on and disappearing from Astera Labs's own greenhouse board since 2026-08-03. Full hiring picture for Astera Labs.

About this role

As a Principal Product Applications Engineer at Astera Labs, you will support the deployment of the Leo Smart Memory Controller and Extender solutions in server, AI, and datacenter platforms. Your role involves troubleshooting complex memory and system issues, collaborating with customers and engineering teams, and driving solutions from integration to production. You will also analyze memory subsystem behavior and create technical documentation to enhance product functionality and customer experience.

Our read on this posting3.2out of 5
benefits
1/5
freshness
1/5
career value
4/5
role clarity
5/5
pay transparency
5/5

Scored from the posting itself — how clearly the role is described, how much it says about pay and benefits, and how recently it was listed. Not a judgement of Astera Labs as an employer.

What you need

  • Significant hands-on experience with DDR/DRAM and memory subsystems in server, datacenter, SoC, controller, semiconductor, or related computing environments.
  • Strong understanding of memory architecture and the interaction between memory, CPUs/SoCs, controllers, and platform components.
  • Experience with memory bring-up, debug, validation, integration, or system-level troubleshooting.
  • Ability to analyze complex technical problems and work across multiple engineering disciplines to identify root cause.
  • Experience working with hardware, systems, validation, product, or customer engineering teams.
  • Strong technical communication skills, including the ability to explain complex memory and system concepts clearly to customers and engineering teams.

Nice to have

  • Experience with CXL or CXL memory.
  • Experience with PCIe or other high-speed interconnects.
  • Hands-on firmware or platform software development/debugging, particularly with C/C++.
  • Experience with BIOS, UEFI, BMC, OpenBMC, or other platform firmware.
  • Experience with memory initialization, training, controller configuration, or platform firmware.

Worth weighing

  • No specific mention of remote work flexibility beyond hybrid options.
  • Direct CXL experience is valuable, but strong DDR/memory expertise is also encouraged, which may indicate a broader candidate pool.
  • The role requires collaboration across various engineering disciplines, which may appeal to those who enjoy interdisciplinary work.

Summarised from Astera Labs's posting. Read the full original.

Listed by Astera Labs on their greenhouse job board, last confirmed open on 2026-10-08. PitchMeAI is not the employer.

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