PitchMeAI Jobs
Astera Labs

Distinguished Formal Verification

Astera Labs · San Jose, CA

Posted about 3 months ago · $230,000 to $285,000

or apply directly on Astera Labs's site. We never take the application ourselves.

Is this posting real?

This role has been open
87 days
Astera Labs's roles stay open a median of 87 days
Reposted
No
Salary listed
Yes
43% of Astera Labs's roles list one
Ghost-job risk at Astera Labs
high
160 stale, 8 reposted of 160 open
Hiring momentum
218 roles opened in the last 90 days
↑ up vs. the prior 90 days
Last confirmed on the employer's board
2026-10-29

Measured from postings appearing on and disappearing from Astera Labs's own greenhouse board since 2026-08-03. Full hiring picture for Astera Labs.

About this role

Astera Labs is looking for a Distinguished Engineer in Formal Verification to lead the formal verification strategy for their AI infrastructure connectivity products. This role involves defining methodologies, mentoring engineers, and ensuring high-quality standards across various protocols like PCIe and CXL. The engineer will also represent the company in industry forums and collaborate with design teams to enhance product reliability and performance.

Our read on this posting3.4out of 5
benefits
1/5
freshness
1/5
career value
5/5
role clarity
5/5
pay transparency
5/5

Scored from the posting itself — how clearly the role is described, how much it says about pay and benefits, and how recently it was listed. Not a judgement of Astera Labs as an employer.

What you need

  • Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or related technical field
  • 15+ years of experience in formal verification or 18+ years in traditional design verification with significant formal verification specialization
  • Strong proficiency in SystemVerilog/Verilog
  • Advanced scripting abilities with Python or Perl
  • Proven ability to manage and prioritize multiple high-impact tasks
  • Strong cross-functional collaboration skills

Nice to have

  • Master's or PhD in Electrical Engineering, Computer Engineering, Computer Science, or Mathematics with focus on formal methods or verification
  • Hands-on experience with formal verification tools such as Synopsys VCFormal and Cadence JasperGold
  • Experience with bug hunting and static proof verification techniques
  • Familiarity with automating formal verification workflows within a CI/CD environment
  • Deep knowledge of high-speed serial protocols: PCIe Gen 4/5/6/7, CXL, Ethernet (100G/400G/800G), UCIe, UALink

What you get

  • Salary range is $230,000 to $285,000 depending on experience, level, and business need
  • Role may be eligible for discretionary bonus, incentives and benefits

Worth weighing

  • High level of experience required, which may limit applicants
  • The role involves significant leadership and mentoring responsibilities
  • Fast-paced environment may require adaptability and quick decision-making

Summarised from Astera Labs's posting. Read the full original.

Listed by Astera Labs on their greenhouse job board, last confirmed open on 2026-10-29. PitchMeAI is not the employer.

More roles at Astera Labs

All 160 open roles at Astera Labs →