Principal Physical Design Engineer, Methodology
Astera Labs · San Jose, California, United States
Posted about 3 months ago · $185,000 to $240,000
or apply directly on Astera Labs's site. We never take the application ourselves.
Is this posting real?
- This role has been open
- 87 days Astera Labs's roles stay open a median of 87 days
- Reposted
- No
- Salary listed
- Yes 43% of Astera Labs's roles list one
- Ghost-job risk at Astera Labs
- high 160 stale, 8 reposted of 160 open
- Hiring momentum
- 218 roles opened in the last 90 days ↑ up vs. the prior 90 days
- Last confirmed on the employer's board
- 2026-10-29
Measured from postings appearing on and disappearing from Astera Labs's own greenhouse board since 2026-08-03. Full hiring picture for Astera Labs.
About this role
The Principal Physical Design Engineer - Methodology will be responsible for defining, developing, and maintaining the reusable physical design flows and automation infrastructure for the physical design team. This includes building the RTL-to-GDSII flow, integrating tools from multiple vendors, and enhancing design quality and efficiency. The role requires collaboration with various teams to optimize processes and ensure best practices across tapeout programs.
- benefits
- 1/5
- freshness
- 1/5
- career value
- 4/5
- role clarity
- 5/5
- pay transparency
- 5/5
Scored from the posting itself — how clearly the role is described, how much it says about pay and benefits, and how recently it was listed. Not a judgement of Astera Labs as an employer.
What you need
- Bachelor's degree in Electrical Engineering, Computer Engineering, or a related field; Masters Preferred
- 8+ years of experience in physical design methodology, CAD, or flow development for complex SoCs at advanced nodes (7nm and below)
- Strong knowledge of synthesis, place-and-route, extraction, STA, and equivalence checking flows
- Experience with both Cadence (Innovus, Tempus, Voltus, Pegasus) and Synopsys (Fusion Compiler, PrimeTime, StarRC, ICC2) toolchains
- Expert-level scripting ability in Python, Tcl, and/or Perl for flow development and automation
- Experience building and maintaining multi-corner/multi-mode analysis infrastructure
Nice to have
- Knowledge of agentic AI solutions for EDA automation
- Experience with CI/CD integration for physical design flows
- Familiarity with compute farm management and job scheduling optimization
- Knowledge of advanced packaging or multi-die integration flows
What you get
- Base salary range of $185,000 to $240,000 depending on experience, level, and business need
- Potential eligibility for discretionary bonus, incentives, and benefits
Worth weighing
- Role is fully on-site in San Jose, CA
- No specific mention of career advancement opportunities or professional development
- Focus on advanced nodes (7nm and below) may imply a highly specialized role
Summarised from Astera Labs's posting. Read the full original.
Listed by Astera Labs on their greenhouse job board, last confirmed open on 2026-10-29. PitchMeAI is not the employer.
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