Principal Electrical Design Engineer
Astera Labs · San Jose, California, United States
Posted 13 days ago · $185,000 - $240,000
or apply directly on Astera Labs's site. We never take the application ourselves.
Is this posting real?
- This role has been open
- 13 days Astera Labs's roles stay open a median of 45 days
- Reposted
- No
- Salary listed
- Yes 43% of Astera Labs's roles list one
- Ghost-job risk at Astera Labs
- high 116 stale, 8 reposted of 160 open
- Hiring momentum
- 218 roles opened in the last 90 days ↑ up vs. the prior 90 days
- Last confirmed on the employer's board
- 2026-09-17
Measured from postings appearing on and disappearing from Astera Labs's own greenhouse board since 2026-08-03. Full hiring picture for Astera Labs.
About this role
The Principal Electrical Design Engineer will lead the architecture and design of advanced board-level hardware for high-performance connectivity platforms, including NIC cards and PCIe systems. This role involves defining technical strategies, overseeing complex hardware development, and collaborating with cross-functional teams to ensure successful product delivery from concept through production. The engineer will also mentor other engineers and represent the hardware engineering team in various technical reviews and engagements.
- benefits
- 1/5
- freshness
- 4/5
- career value
- 5/5
- role clarity
- 5/5
- pay transparency
- 5/5
Scored from the posting itself — how clearly the role is described, how much it says about pay and benefits, and how recently it was listed. Not a judgement of Astera Labs as an employer.
What you need
- Bachelor’s or Master’s degree in Electrical Engineering or a closely related field; advanced degree preferred
- 12+ years of progressive hardware design experience with deep expertise in board-level electrical engineering
- Extensive track record of architecting and delivering production hardware for server, networking, storage, or high-performance compute systems
- Expert-level experience with high-speed SerDes-based systems supporting Ethernet, PCIe, or related protocols
- Expert understanding of signal integrity fundamentals
- Expert power integrity and PDN design knowledge
Nice to have
- Experience defining architecture for NIC cards or PCIe add-in card platforms
- Experience leading server chassis or system board design programs
- Deep expertise with 800G Ethernet and emerging 1.6T electrical interfaces
- Experience architecting solutions using retimers and high-speed interconnect subsystems
- Expertise in compliance and validation workflows for PCIe and Ethernet platforms
What you get
- Base pay range for this role is $185,000 - $240,000, determined by location and experience
Worth weighing
- On-site role in San Jose, California
- High level of responsibility and influence expected in this principal-level position
- No specific mention of additional benefits or perks beyond salary
Summarised from Astera Labs's posting. Read the full original.
Listed by Astera Labs on their greenhouse job board, last confirmed open on 2026-09-17. PitchMeAI is not the employer.
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