Astera Labs

Principal Architect

Astera Labs · Tel Aviv-Yafo, Tel Aviv District, Israel

Posted about 3 months ago

or apply directly on Astera Labs's site. We never take the application ourselves.

Is this posting real?

This role has been open
87 days
Astera Labs's roles stay open a median of 87 days
Reposted
No
Salary listed
No
43% of Astera Labs's roles list one
Ghost-job risk at Astera Labs
high
160 stale, 8 reposted of 160 open
Hiring momentum
218 roles opened in the last 90 days
↑ up vs. the prior 90 days
Last confirmed on the employer's board
2026-10-29

Measured from postings appearing on and disappearing from Astera Labs's own greenhouse board since 2026-08-03. Full hiring picture for Astera Labs.

About this role

The Principal Architect at Astera Labs will lead the design of high-performance connectivity solutions, focusing on PCIe and Ethernet systems for AI infrastructure. This role involves defining system architectures, collaborating with cross-functional teams, and mentoring engineers, while also influencing the technical direction of the Israel R&D center.

Our read on this posting2.2out of 5
benefits
1/5
freshness
1/5
career value
5/5
role clarity
4/5
pay transparency
0/5

Scored from the posting itself — how clearly the role is described, how much it says about pay and benefits, and how recently it was listed. Not a judgement of Astera Labs as an employer.

What you need

  • 10+ years of experience in semiconductor architecture, ASIC design, or system engineering
  • Strong expertise in PCIe architecture (Gen4/5/6+) and its ecosystem
  • Deep understanding of Networking and Ethernet (e.g., 25G/50G/100G/400G and beyond)
  • Experience designing high-speed, low-latency data paths
  • Solid understanding of SoC architecture and integration challenges
  • Experience working across full chip development lifecycle

Nice to have

  • Experience with CXL, NVLink, UALink, or other advanced interconnect protocols
  • Background in AI/ML infrastructure, data center systems, or hyperscaler environments
  • Experience with SerDes-based systems and high-speed PHY integration
  • Familiarity with networking stacks, switching, or RDMA technologies
  • Experience with performance modeling tools and architectural simulators

Worth weighing

  • No salary listed
  • Role involves significant influence and ownership in a new site, which may come with both opportunities and challenges
  • Focus on high-speed connectivity solutions may require staying updated with rapidly evolving technologies

Summarised from Astera Labs's posting. Read the full original.

Listed by Astera Labs on their greenhouse job board, last confirmed open on 2026-10-29. PitchMeAI is not the employer.

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