Digital Verification Engineer
IC Resources · Auvergne-Rhône-Alpes, France
- On site
- Full-time
- $150,000 / year
- Auvergne-Rhône-Alpes, France
Job highlights
- Lead digital verification strategy for advanced ASICs.
- Develop and implement IC verification methodologies.
- Oversee test bench and test case development.
- Collaborate with design and validation teams.
- Shape future of digital verification technologies.
About the role
Principal Digital Verification Engineer
Are you a seasoned Verification Engineer with a passion for leading innovative digital verification projects? Do you excel in an environment where your expertise will be applied to advanced SoC and ASIC design? IC Resources is offering an exceptional opportunity for you to step into the role of Principal Verification Engineer and make a real impact.
About The Role
As our Digital Verification Engineer, you’ll play a key role in guiding the technical verification strategy and execution for cutting-edge digital ASICs. You’ll lead a skilled team through complex verification processes, collaborating closely with digital and mixed-signal IC design specialists to deliver next-generation technology. This role offers a unique chance to shape the future of digital verification within a fast-paced, innovative environment.
Key Responsibilities
- Technical Leadership: As the Principal Verification Engineer, you’ll lead the verification team in implementing a robust and efficient strategy for verifying advanced ASICs.
- Methodology Development: Work with other technical leaders to define and implement IC verification methodologies, bringing your strategic vision as a Principal Verification Engineer to the fore.
- Hands-on Execution: Oversee the development of subsystem and top-level verification plans, including writing self-checking test benches and test cases.
- Design Enhancement: Participate in the design and improvement of Verification IPs, working closely with the Analogue Mixed-Signal team for effective simulations.
- Cross-functional Collaboration: Support the Silicon Validation team in evaluating manufactured ASICs and adhere to quality assurance protocols throughout the project cycle.
About You
- Educational Background: MSc or PhD in Electrical Engineering or a related field.
- Experience: Experience in chip-level and circuit-level verification, with specialist knowledge in SystemVerilog/UVM.
- Technical Skills: Skilled in scripting languages (TCL, Python, Makefile) with a deep understanding of the full ASIC flow, including experience in Gate-Level Simulation and/or DFT.
- Desirable Expertise: Experience with ARM/RISC V CPUs, PCIe, Ethernet, DRAM, A/D and D/A Converters, and/or RF transceivers. Familiarity with Cadence or Synopsys tools and Formal Verification is advantageous.
- Personal Qualities: A proactive and creative team player with a critical approach to problem-solving. Excellent analytical skills and fluency in English (written and spoken).
As a Principal Verification Engineer, you’ll have the opportunity to work on groundbreaking projects at the forefront of digital verification, advancing your career in a leadership role while shaping the direction of a high-performing team. Based in Paris, Caen, or Grenoble with flexible remote options, you’ll be part of a collaborative, innovative environment that values creativity, initiative, and teamwork.
If you’re ready to make a lasting impact as a Digital Verification Engineer and lead from the front in digital verification, we’d love to hear from you. Apply today or contact Jordan Browne at IC Resources for further details.
Key skills/competency
- Digital Verification
- ASIC Design
- SystemVerilog
- UVM
- SoC Verification
- Verification IP
- Scripting (TCL, Python)
- Gate-Level Simulation
- DFT
- Formal Verification
Skills & topics
- Digital Verification Engineer
- ASIC Verification
- SystemVerilog
- UVM
- SoC Design
- IC Design
- Hardware Engineering
- Electrical Engineering
- Verification Lead
- TCL
- Python
- Makefile
- Gate-Level Simulation
- DFT
- Formal Verification
- RISC-V
- ARM
- PCIe
- Ethernet
- DRAM
How to get hired
- Tailor your resume: Highlight your MSc/PhD, SystemVerilog/UVM experience, and scripting skills for the Principal Digital Verification Engineer role.
- Showcase leadership: Emphasize your experience in leading verification teams and developing verification strategies.
- Demonstrate technical expertise: Detail your knowledge of ASIC flow, Gate-Level Simulation, DFT, and specific desirable expertise like ARM/RISC V.
- Quantify achievements: Provide specific examples of successful verification projects and your impact.
- Prepare for technical interviews: Be ready to discuss complex verification challenges and your problem-solving approach.
Technical preparation
Behavioral questions
Frequently asked questions
- What is the primary focus for a Principal Digital Verification Engineer at IC Resources?
- The primary focus for a Principal Digital Verification Engineer at IC Resources is to lead the technical verification strategy and execution for cutting-edge digital ASICs, guiding a team through complex verification processes.
- What educational background is required for the Principal Digital Verification Engineer position?
- A Master of Science (MSc) or PhD in Electrical Engineering or a related field is required for the Principal Digital Verification Engineer position at IC Resources.
- What are the essential technical skills for this Digital Verification Engineer role?
- Essential technical skills include specialist knowledge in SystemVerilog/UVM, proficiency in scripting languages like TCL, Python, and Makefile, and a deep understanding of the full ASIC flow, including Gate-Level Simulation and/or DFT.
- Does IC Resources offer remote work options for the Principal Digital Verification Engineer role?
- Yes, IC Resources offers flexible remote options for the Principal Digital Verification Engineer role, in addition to being based in Paris, Caen, or Grenoble.
- What kind of projects can I expect to work on as a Principal Digital Verification Engineer?
- As a Principal Digital Verification Engineer, you can expect to work on groundbreaking projects at the forefront of digital verification, involving advanced SoC and ASIC design.
- What is the importance of cross-functional collaboration in this role?
- Cross-functional collaboration is important as the Principal Digital Verification Engineer will support the Silicon Validation team in evaluating manufactured ASICs and work with the Analogue Mixed-Signal team for effective simulations.
- Are there specific hardware or protocol experiences that are advantageous for this role?
- Experience with ARM/RISC V CPUs, PCIe, Ethernet, DRAM, A/D and D/A Converters, and/or RF transceivers is considered desirable expertise for this Principal Digital Verification Engineer role.
- How can I apply for the Principal Digital Verification Engineer job at IC Resources?
- You can apply for the Principal Digital Verification Engineer job by submitting your application through the company's careers portal or by contacting Jordan Browne at IC Resources for further details.