Silicon RTL IP Subsystem Engineer @ Google
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About the Silicon RTL IP Subsystem Engineer Role
Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of Google's direct-to-consumer products. Your expertise will shape the next generation of hardware experiences with unparalleled performance, efficiency, and integration.
Minimum Qualifications
- Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science or a related field or equivalent practical experience.
- 5 years of experience in ASIC development using Verilog/SystemVerilog, VHDL, or Chise.
- Experience in ASIC design verification, synthesis, timing/power analysis, and Design for Testing (DFT).
- Experience with micro-architecture and designing IPs and subsystems.
Preferred Qualifications
- Experience with coding languages such as Python or Perl.
- Experience in System on a Chip (SoC) designs and integration flows.
- Knowledge of arithmetic units, bus architectures, processor design, accelerators, or memory hierarchies.
- Understanding of high performance and low power design techniques.
About the Job
You will be working on ASICs used to accelerate machine learning computation in data centers, collaborating with architecture, verification, power and performance, and physical design teams. The role involves solving technical problems related to micro-architecture and evaluating design options on complexity, performance, and power. You will engage closely with Architecture, Firmware, and Software teams in the ML, Systems, & Cloud AI (MSCA) organization at Google to deliver quality design for next-generation data center accelerators.
Responsibilities
- Own the microarchitecture and implementation of Internet Protocol (IP) and subsystems.
- Collaborate with Architecture, Firmware, and Software teams for feature closure and microarchitecture specifications.
- Drive design methodologies, libraries, debugging, and code reviews with DV and physical design teams.
- Identify and push improvements in power, performance, and area.
Key skills/competency
- ASIC development
- Verilog/SystemVerilog
- VHDL
- DFT
- Microarchitecture
- Design Verification
- Timing Analysis
- Power Analysis
- SoC
- Hardware Integration
How to Get Hired at Google
🎯 Tips for Getting Hired
- Research Google culture: Study mission, values, and recent projects.
- Customize your resume: Emphasize ASIC and hardware design skills.
- Practice technical interviews: Focus on RTL and verification topics.
- Prepare design examples: Bring detailed project experiences.