Silicon Design Verification Engineer

About the Role

As a Silicon Design Verification Engineer at Google, you will play a pivotal role in shaping the future of AI/ML hardware acceleration. This position offers a unique opportunity to drive cutting-edge Tensor Processing Unit (TPU) technology, essential for powering Google's most demanding AI/ML applications. You'll contribute to a team that is constantly pushing boundaries, developing custom silicon solutions that are integral to Google's innovations and products loved by millions globally. Your expertise in design and verification will be leveraged to verify complex digital designs, with a particular focus on TPU architecture and its seamless integration within AI/ML-driven systems.

In this role, you will manage the full verification lifecycle, from initial planning and test execution to comprehensive coverage closure. Your work will directly ensure that Artificial Intelligence/Machine Learning (AI/ML) performance and accuracy goals are met. You will be responsible for building constrained-random verification environments capable of uncovering elusive corner-case bugs, thereby guaranteeing the reliability of AI/ML workloads on TPU hardware. Collaboration with design and verification engineers on various projects and performing thorough verification will be a key aspect of your daily activities.

The AI and Infrastructure team at Google is dedicated to redefining what's possible, empowering Google customers with breakthrough capabilities and insights through unparalleled scale, efficiency, reliability, and velocity. Our diverse customer base includes Googlers, Google Cloud clients, and billions of Google users worldwide. We are the driving force behind Google's groundbreaking innovations, developing cutting-edge AI models, delivering immense computing power to global services, and providing essential platforms for developers to build the future. Our teams, spanning software and hardware, are shaping the future of world-leading hyperscale computing, with significant contributions to TPUs, Vertex AI for Google Cloud, Google Global Networking, Data Center operations, and systems research.

Minimum Qualifications

• Bachelor's degree in Electrical Engineering or equivalent practical experience.
• 4 years of experience with verification methodology such as Universal Verification Methodology (UVM).
• 2 years of experience in the verification of Intellectual Property (IP) designs such as IP, System on a Chip (SoC), or vector CPUs.
• Experience with verification methodologies and languages such as UVM or SystemVerilog.
• Experience developing and maintaining verification testbenches, test cases, and test environments.

Preferred Qualifications

• Master's degree in Electrical Engineering or a related field.
• Experience with industry-standard simulators, revision control systems, and regression systems.
• Experience with the full verification lifecycle.
• Experience in Artificial Intelligence/Machine Learning (AI/ML) Accelerators or vector processing units.
• Excellent problem-solving and communication skills.

Responsibilities

• Debug tests with design engineers to deliver functionally correct design blocks.
• Perform integration checks like connectivity.
• Write tests in SystemVerilog (SV) and assembly/C.
• Perform SoC Boot, configuration, and data path verification at SoC level.
• Participate in design debug and code reviews in coordination with other IP Design Verification (DV) teams and Silicon validation teams.

Key skills/competency

• UVM
• SystemVerilog
• Verification Methodology
• IP Design Verification
• SoC Verification
• Testbench Development
• AI/ML Accelerators
• TPU Architecture
• Coverage Closure
• Debugging