ASIC Engineer RTL Integration

@ Google

Minimum Qualifications

Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience.

3 years of experience with Register-Transfer Level (RTL) design and integration using Verilog/System Verilog, microarchitecture and automation.

3 years of experience with the Register-Transfer Level quality check tool flows such as Lint, Clock Domain Crossing, Reset Domain Crossing, Synthesis.

Preferred Qualifications

Experience with methodologies for RTL quality checks (e.g., Lint, CDC, RDC).

Experience with IP integration methodology, IP Design, ARM-based SoCs, ARM-protocols and ASIC methodology.

Experience with methodologies for low power estimation, timing closure, synthesis.

Knowledge in one or more of these areas: Interconnects, Debug and Trace, Security, Interrupts, Clocks/Reset, Power/Voltage Domains, Pin Multiplexing.

About The Job

Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of Google's direct-to-consumer products. Your expertise will shape the next generation of hardware experiences with unparalleled performance, efficiency, and integration.

Google's mission is to organize the world's information and make it universally accessible and useful. The team combines Google AI, Software, and Hardware to create radically helpful experiences and develop new technologies in hardware to make computing faster, seamless, and more powerful.

Responsibilities

• Define microarchitecture details for IP integration at macro/Sub-System Workload Requirements Plan level.
• Perform RTL development using SystemVerilog and debug simulations.
• Conduct RTL quality checks including Lint, CDC, Synthesis, and UPF checks.
• Participate in synthesis, timing/power estimation and FPGA/silicon bring-up.

Key skills/competency

• RTL design
• SystemVerilog
• Verification
• IP integration
• ASIC methodology
• Synthesis
• Timing closure
• Low power estimation
• Debug
• Quality checks