ASIC Engineer, IP Design @ Google
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Job Details
Minimum Qualifications
Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience.
- 8 years of experience with RTL design using Verilog/SystemVerilog and microarchitecture.
- Experience with a scripting language like Python or Perl.
- Experience with ARM-based SoCs, interconnects and ASIC methodology.
Preferred Qualifications
- Master's degree or PhD in Electrical Engineering, Computer Engineering or Computer Science with emphasis on computer architecture.
- 10 years of industry experience with IP design.
- Experience with low power estimation, timing closure, synthesis.
- Experience with methodologies for RTL quality checks (e.g., Lint, CDC, RDC).
About the Job
Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of Google's direct-to-consumer products. Your expertise will shape next-generation hardware experiences by delivering unparalleled performance, efficiency, and integration.
Google's mission is to organize the world's information and make it universally accessible and useful. The team combines the best of Google AI, Software, and Hardware to create radically helpful experiences by researching, designing and developing new technologies and hardware.
Compensation
The US base salary range for this full-time position is $156,000-$229,000 + bonus + equity + benefits. Salary is determined by role, level, work location, and additional factors. Compensation details reflect base salary only; bonus, equity, and benefits are separate.
Responsibilities
- Define microarchitecture details, block diagrams, data flow, and pipelines.
- Perform RTL development (SystemVerilog) and debug functional/performance simulations.
- Conduct RTL quality checks including Lint, CDC, Synthesis, and UPF checks.
- Participate in synthesis, timing/power estimation, and FPGA/silicon bring-up.
- Communicate and collaborate with multi-disciplined, multi-site teams.
Key skills/competency
ASIC Engineer, IP Design, RTL design, SystemVerilog, microarchitecture, ARM SoCs, Python, low power, synthesis, debug
How to Get Hired at Google
🎯 Tips for Getting Hired
- Research Google: Understand its culture, products, and innovations.
- Customize Resume: Highlight RTL, SystemVerilog, ASIC skills.
- Network Strategically: Connect with current Google engineers on LinkedIn.
- Prepare Interviews: Practice technical and behavioral questions.