ASIC Verification Engineering Manager

About Cornelis Networks

Cornelis Networks is at the forefront of delivering world-class scale-out networking solutions for demanding AI and HPC datacenters. Our innovative architecture seamlessly integrates hardware, software, and system-level technologies to optimize the efficiency of GPU, CPU, and accelerator-based compute clusters. We empower customers to achieve breakthroughs in AI and HPC workloads, pushing the boundaries of innovation. Backed by top-tier venture capital and strategic investors, we are committed to performance, scalability, and solving the most complex computational challenges.

We are a rapidly growing, forward-thinking team of architects, engineers, and business professionals with a proven track record. As a global organization, our team spans multiple U.S. states and six countries, actively expanding with exceptional talent in onsite, hybrid, and fully remote roles.

The Opportunity: ASIC Verification Engineering Manager

Cornelis Networks is seeking a talented ASIC Verification Engineering Manager to drive innovation and contribute to the development of cutting-edge technologies in the semiconductor industry. In this pivotal role, you will lead an ASIC Design Verification Team, ensuring high-quality block-level and full-chip verification and emulation activities. You will be responsible for overseeing verification test planning, execution, developing innovative verification methodologies, and driving functional and code coverage closure.

Key Responsibilities

• Collaborate closely with RTL, architecture, software/firmware, emulation, and post-silicon validation teams, engaging and driving cross-functional initiatives.
• Contribute to the development and execution of a Design Verification (DV) strategy aligned with company objectives for first-pass silicon success.
• Lead the hiring, training, and support of a team of ASIC engineers to ensure timely and cost-effective product development.
• Manage people aspects to support organizational goals effectively.

Minimum Qualifications

• 15+ years of experience in ASIC/SoC design verification.
• 5+ years of experience leading a team of direct reports.
• Expertise in design verification tools such as Synopsys VCS and Verdi.
• Proven success in first-pass ASIC development.
• Experience managing multiple projects and adjusting priorities with stakeholders.
• Proficiency in developing UVM constrained random test benches.
• Strong understanding of interpreting functional specifications and creating comprehensive test plans.
• B.S. or M.S. in Computer Engineering, Electrical Engineering, or related technical field, or equivalent practical experience.

Preferred Qualifications

• Experience in building UVM environments from scratch.
• Previous experience in a startup environment, demonstrating adaptability and a hands-on approach.
• Expertise in working with networking System on Chips (SOCs).
• Strong leadership in a dynamic, fast-paced development environment.

Location & Benefits

This is a remote position for employees residing within the United States. We offer a competitive compensation package including equity, cash, and incentives, alongside health and retirement benefits. Our dynamic, flexible work environment fosters collaboration with influential names in the semiconductor industry.

Key skills/competency

• ASIC Verification
• SoC Design
• UVM
• Synopsys VCS
• Verdi
• Test Plan Development
• Functional Coverage
• Code Coverage
• Team Leadership
• Semiconductor Industry
• AI/HPC Networking