Senior RTL Design Engineer

About AMD and the Role

At AMD, our mission is to build great products that accelerate next-generation computing experiences—from AI and data centers, to PCs, gaming and embedded systems. Grounded in a culture of innovation and collaboration, we believe real progress comes from bold ideas, human ingenuity and a shared passion to create something extraordinary. When you join AMD, you’ll discover the real differentiator is our culture. We push the limits of innovation to solve the world’s most important challenges—striving for execution excellence, while being direct, humble, collaborative, and inclusive of diverse perspectives. Join us as we shape the future of AI and beyond. Together, we advance your career.

This role will focus on planning, micro architecting, documenting, coding, and debugging the RTL for new and existing features for AMD’s Infinity Data Fabric, with a focus on complexity, timing, area, and power consumption efficiency.

The Person

You have a passion for modern, complex processor architecture, digital design, and verification in general. You are a team player who has excellent communication skills and experience collaborating with other engineers located in different sites and time zones. You have strong analytical and problem-solving skills and are willing to learn and ready to take on problems.

Key Responsibilities

• Collaborate with architects, hardware engineers, and firmware engineers to understand new features to be designed.
• Micro-architect the feature, document it, estimate the effort, and review the implementation with the RTL lead and verification team.
• Execute the RTL code of the new feature with best quality and within the estimated duration.
• Debug and fix RTL bugs, fix timing, area, and power consumption issues.
• Provide debug support for SOC simulation, emulation, and actual silicon bring-up in the lab.
• Analyze code coverage and detect holes in the verification environment.

Preferred Experience

• Experience with digital circuits and the ability to synthesize small circuitry.
• Experience with Verilog Hardware Description Language is highly desirable.
• Good understanding of how a microprocessor/microcontroller works and how such devices can be interfaced with various peripherals like memories and IO devices.
• Good understanding of cache coherency protocols is desirable.
• Proficient in debugging firmware and RTL code using simulation tools.
• Exposure to leadership or mentorship is an asset.
• Excellent communication skills & teamwork experience is highly desirable.
• Experience with scripting languages like TCL, Perl, Python is a plus.
• Exposure to basic Linux commands (awk, sed, vim & regular expression) is a plus.
• Exposure to EDA tools, like those from Synopsys, Cadence, Mentor Graphics, Xilinx is a plus.

Academic Credentials

• Bachelors or Masters degree in Computer Engineering/Electrical Engineering.

Key Skills/Competency

• RTL Design
• Verilog
• Micro architecture
• Digital Design
• Verification
• SoC Simulation
• Timing Analysis
• Power Consumption
• FPGA Emulation
• Hardware Engineering