
EDA Tools Hardware Engineer
Intel · Santa Clara, CA
- On site
- Full-time
- $205,000 / year
- Santa Clara, CA
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EDA Tools Hardware Engineer
Intel · Santa Clara, CA
Alex Rivera
Hiring Manager · h•••••@intel.wd1.myworkdayjobs.com
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Subject: Interested in the EDA Tools Hardware Engineer role at Intel
Hi Alex — I came across the EDA Tools Hardware Engineer opening and wanted to reach out directly. I've spent the last few years doing exactly this kind of work, and Intel stood out because…
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Not recommended alone — most applicants never hear back.
Job highlights
- Shape silicon innovation as an EDA Tools Hardware Engineer.
- Develop cutting-edge hardware design tools and flows.
- Optimize power, performance, and technology node advancements.
- Collaborate with EDA vendors on next-generation tools.
- Enhance design process efficiency and methodologies.
About the role
The Role and Impact
Join Intel's world-class team as an EDA Tools Hardware Engineer, where you will play a pivotal role in shaping the future of silicon innovation. This position directly contributes to the enablement and adoption of cutting-edge hardware design tools, flows, and methodologies. Your work will enhance the efficiency of design processes and optimize power, performance, and technology node advancements. As part of Intel, you will have the unique opportunity to collaborate with EDA vendors, define next-generation design tools, and contribute to groundbreaking innovations that enrich lives worldwide.Key Responsibilities
Full Chip Implementation Flow Development Develop and maintain full-chip physical implementation flows including:- Floor planning and partitioning strategies
- Hierarchical block integration
- Chip-level placement and routing coordination
- Power grid planning and analysis
- Clock tree synthesis (CTS) strategy integration
Qualifications
Minimum Qualifications- Bachelor's degree in Computer Engineering, Electrical Engineering, Computer Science, or a related field with 6+ years of experience; or a Master's degree with 4+ years of experience; or a PhD with 2+ years of experience
- Physical design fundamentals (I.e. placement, routing)
- Clock tree synthesis (CTS)
- Full-chip integration methodologies using Innovus
- Static timing analysis (STA)
- Power grid design and IR drop concepts
- Experience with large SoC or multi-block design implementation flows
- Experience scripting and automation skills in Linux environments
Job Type
Experienced HireShift
Shift 1 (United States of America)Primary Location
US, California, Santa ClaraAdditional Locations
US, California, Folsom, US, Oregon, Hillsboro, US, Texas, AustinBusiness Group
Intel Foundry strives to make every facet of semiconductor manufacturing state-of-the-art while delighting our customers -- from delivering cutting-edge silicon process and packaging technology leadership for the AI era, enabling our customers to design leadership products, global manufacturing scale and supply chain, through the continuous yield improvements to advanced packaging all the way to final test and assembly. We ensure our foundry customers' products receive our utmost focus in terms of service, technology enablement and capacity commitments. Employees in the Foundry Technology Manufacturing are part of a worldwide factory network that designs, develops, manufactures, and assembly/test packages the compute devices to improve the lives of every person on Earth.Posting Statement
All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.Position of Trust
N/ABenefits
We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock bonuses, and benefit programs which include health, retirement, and vacation. Find out more about the benefits of working at Intel.Annual Salary Range
$141,910.00 - 269,100.00 USD The range displayed on this job posting reflects the minimum and maximum target compensation for the position across all US locations. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Your recruiter can share more about the specific compensation range for your preferred location during the hiring process.Work Model for this Role
This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. * Job posting details (such as work model, location or time type) are subject to change.Additional Information
Intel is committed to Responsible Business Alliance (RBA) compliance and ethical hiring practices. We do not charge any fees during our hiring process. Candidates should never be required to pay recruitment fees, medical examination fees, or any other charges as a condition of employment. If you are asked to pay any fees during our hiring process, please report this immediately to your recruiter.Key skills/competency
EDA Tools, Hardware Engineer, Silicon Innovation, Design Tools, Design Flows, Methodologies, Physical Implementation, SoC Assembly, Scripting, AutomationSkills & topics
- EDA Tools
- Hardware Engineer
- Silicon Design
- Physical Implementation
- Clock Tree Synthesis
- Full Chip Integration
- SoC Assembly
- Innovus
- STA
- Linux Scripting
How to get hired
- Tailor your resume: Highlight your experience with EDA tools, physical design, and full-chip integration, using keywords from the job description.
- Showcase technical skills: Emphasize your expertise in placement, routing, CTS, STA, and scripting in Linux environments.
- Quantify achievements: Use numbers to demonstrate your impact on design efficiency, power, and performance in previous roles.
- Prepare for technical interviews: Be ready to discuss physical design fundamentals and full-chip integration methodologies.
- Understand Intel's culture: Research Intel Foundry's mission and values to align your application and interview responses.
Technical preparation
Master physical design fundamentals (placement, routing).,Practice with Innovus for full-chip integration.,Develop scripting skills for Linux automation.,Study STA and power grid analysis concepts.
Behavioral questions
Describe a complex chip integration challenge you solved.,How do you collaborate with external EDA vendors?,Share an example of improving design process efficiency.,How do you handle staying updated with new technologies?
Prefer to apply the usual way?
Not recommended alone — most applicants never hear back. Email the hiring manager first.
Frequently asked questions
- What are the key technical skills required for an EDA Tools Hardware Engineer at Intel?
- The key technical skills for an EDA Tools Hardware Engineer at Intel include a strong understanding of physical design fundamentals such as placement and routing, clock tree synthesis (CTS), and full-chip integration methodologies using tools like Innovus. Experience with static timing analysis (STA), power grid design, and scripting/automation in Linux environments is also highly preferred.
- What is the typical career path for an EDA Tools Hardware Engineer at Intel?
- An EDA Tools Hardware Engineer at Intel can progress by deepening their expertise in physical design and tool development, taking on more complex chip integration projects, or moving into leadership roles. Opportunities may also exist in collaborating with EDA vendors to define future tools and methodologies, contributing to Intel's foundry services.
- What educational background is preferred for this role at Intel?
- Intel prefers candidates with a Bachelor's degree in Computer Engineering, Electrical Engineering, Computer Science, or a related field. While a Bachelor's with 6+ years of experience is the minimum, Master's degrees with 4+ years or PhDs with 2+ years of relevant experience are also considered valuable.
- How does Intel support career growth for its EDA Tools Hardware Engineers?
- Intel supports career growth through continuous learning opportunities, collaboration with industry leaders and EDA vendors, and exposure to cutting-edge silicon design challenges. The company also offers competitive compensation, stock bonuses, and comprehensive benefits to foster long-term employee development.
- What is the work model for the EDA Tools Hardware Engineer position at Intel?
- This role follows a hybrid work model, allowing employees to balance on-site work at an Intel facility with remote work. This provides flexibility while ensuring collaboration and access to necessary resources.
- What is the salary range for an EDA Tools Hardware Engineer at Intel in the US?
- The annual salary range for this position in the US is between $141,910.00 and $269,100.00 USD. The final compensation will depend on factors like work location, experience, and specific skills.
- How does Intel ensure ethical hiring practices for the EDA Tools Hardware Engineer role?
- Intel is committed to ethical hiring and RBA compliance. They do not charge any fees during the hiring process. Candidates should report any requests for payment to their recruiter immediately.
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