or apply directly on Tensordyne's site. We never take the application ourselves.
Is this posting real?
- This role has been open
- 22 days Tensordyne's roles stay open a median of 45 days
- Reposted
- No
- Salary listed
- No 0% of Tensordyne's roles list one
- Ghost-job risk at Tensordyne
- high 12 stale, 1 reposted of 17 open
- Hiring momentum
- 17 roles opened in the last 90 days ↑ up vs. the prior 90 days
- Last confirmed on the employer's board
- 2026-09-17
Measured from postings appearing on and disappearing from Tensordyne's own greenhouse board since 2026-08-03. Full hiring picture for Tensordyne.
About this role
As a Sr. Staff ASIC Design Engineer at Tensordyne, you will focus on the microarchitecture and design implementation of high-performance AI ASICs. Your responsibilities will include authoring specifications, architecting complex RTL designs, integrating CPU and third-party IPs, and collaborating with physical design teams to resolve issues. You will also conduct post-silicon validation tests and assist with software bring-up in the lab.
- benefits
- 2/5
- freshness
- 4/5
- career value
- 5/5
- role clarity
- 4/5
- pay transparency
- 0/5
Scored from the posting itself — how clearly the role is described, how much it says about pay and benefits, and how recently it was listed. Not a judgement of Tensordyne as an employer.
What you need
- 10+ years of ASIC design experience with a demonstrable track record of RTL logic design in multi-million gate ASICs with Verilog or System Verilog
- Experience in IP integration, specifically CPU IP into SoC
- Knowledge of ARM/RISC-V/MIPS Architectures, Memory hierarchy, Cache coherency, Virtual memory, Multicore CPU operation
- Familiarity with AMBA/APB/AXI Protocol
- Familiarity with processor peripheral interfaces like SPI, eMMC, *MII, GPIO, I2C
- Hands-on experience in all aspects of the ASIC development process with proficiency in front-end tools and methodologies
Nice to have
- Previous experience with timing closure at high frequencies
- Interest to explore AI architectures for convolution, transformer and other kinds of workloads
What you get
- Competitive benefits package including Medical, Vision, Dental
- Perks including meals, snacks, drinks
- Flexible work hours & unlimited PTO policy
Worth weighing
- No salary listed
- Fast-paced startup environment may require adaptability
- Focus on AI ASICs may limit exposure to other areas of ASIC design
Summarised from Tensordyne's posting. Read the full original.
Listed by Tensordyne on their greenhouse job board, last confirmed open on 2026-09-17. PitchMeAI is not the employer.
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