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SonicWall

Senior Software Engineer - Dataplane High Availability & Clustering

SonicWall · Pune, Maharashtra, India

Posted about 3 months ago

or apply directly on SonicWall's site. We never take the application ourselves.

Is this posting real?

This role has been open
81 days
SonicWall's roles stay open a median of 82 days
Reposted
No
Salary listed
No
0% of SonicWall's roles list one
Ghost-job risk at SonicWall
high
44 stale, 2 reposted of 44 open
Hiring momentum
73 roles opened in the last 90 days
↑ up vs. the prior 90 days
Last confirmed on the employer's board
2026-10-24

Measured from postings appearing on and disappearing from SonicWall's own greenhouse board since 2026-08-03. Full hiring picture for SonicWall.

About this role

The Senior Software Engineer will focus on architecting and optimizing the dataplane high availability subsystem for SonicWall's hardware and virtual firewalls. Responsibilities include designing fast-path HA engines, implementing stateful session mirroring, and ensuring zero packet loss during failover. The role requires deep expertise in high-performance networking and involves technical leadership, including mentoring other engineers and driving architecture reviews.

Our read on this posting2.4out of 5
benefits
1/5
freshness
1/5
career value
5/5
role clarity
5/5
pay transparency
0/5

Scored from the posting itself — how clearly the role is described, how much it says about pay and benefits, and how recently it was listed. Not a judgement of SonicWall as an employer.

What you need

  • 7+ years of C/C++ development for high-performance networking dataplanes — firewalls, routers, switches, or carrier-grade appliances.
  • Production experience with lock-free session mirroring, Active/Active packet steering, and stateful failover at 10G–100G+ line rates.
  • Deep hands-on with DPDK, ODP, OFP, or XDP/eBPF including zero-copy buffers, ring queues, and CPU core pinning.
  • Expertise in IPsec SA fast-path lookups, SSL-VPN encapsulation/decapsulation, and TCP/UDP conntrack state synchronization.
  • Working knowledge of crypto offload engines (QAT, Marvell OCTEON, Cavium/Nitrox) or SmartNIC/DPU integration into packet pipelines.
  • Expert in cache-line alignment, lock-free concurrency, memory barriers, and NUMA-aware data structures for packet processors.

Nice to have

  • Experience with NGFW dataplane HA (Palo Alto PAN-OS, Fortinet FortiOS, Cisco ASA/FTD, Check Point ClusterXL).
  • Cloud/virtual firewall dataplane HA (AWS SR-IOV, Azure Accelerated Networking, VMware ESXi DVS).
  • Exposure to 400GbE, SmartNIC, or DPU architectures (NVIDIA BlueField, Intel IPU).
  • Automated failure-injection and packet-level testing (IXIA, Spirent, TRex).

Worth weighing

  • No salary listed.
  • The role requires advanced technical skills and experience in a specialized area of networking, which may limit the candidate pool.
  • The position involves significant technical leadership responsibilities, which may not suit all candidates.
  • The job is focused on high-performance networking, which may involve working with legacy systems depending on the existing infrastructure.

Summarised from SonicWall's posting. Read the full original.

Listed by SonicWall on their greenhouse job board, last confirmed open on 2026-10-24. PitchMeAI is not the employer.

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