Staff Engineer, DRAM
Samsung Semiconductor · San Jose, California, United States
Posted about 2 months ago
or apply directly on Samsung Semiconductor's site. We never take the application ourselves.
Is this posting real?
- This role has been open
- 51 days Samsung Semiconductor's roles stay open a median of 80 days
- Reposted
- No
- Salary listed
- No 0% of Samsung Semiconductor's roles list one
- Ghost-job risk at Samsung Semiconductor
- high 66 stale, 1 reposted of 69 open
- Hiring momentum
- 93 roles opened in the last 90 days ↑ up vs. the prior 90 days
- Last confirmed on the employer's board
- 2026-10-23
Measured from postings appearing on and disappearing from Samsung Semiconductor's own greenhouse board since 2026-08-03. Full hiring picture for Samsung Semiconductor.
About this role
As a Staff Engineer in the DRAM Design Lab at Samsung, you will be responsible for developing and optimizing DRAM architecture for next-generation products, including High Bandwidth Memory (HBM). Your role involves leading design specifications, conducting performance analyses, and collaborating with cross-functional teams to ensure alignment with product strategies. You will also focus on enhancing chip reliability and power consumption through innovative design methodologies.
- benefits
- 3/5
- freshness
- 4/5
- career value
- 4/5
- role clarity
- 4/5
- pay transparency
- 0/5
Scored from the posting itself — how clearly the role is described, how much it says about pay and benefits, and how recently it was listed. Not a judgement of Samsung Semiconductor as an employer.
What you need
- Bachelors with 10+ years of relevant industry experience, or Masters with 8+ years or PhD with 5+ years of experience in DRAM or related technical field
- Required knowledge, achievements, and skillsets in memory design
- Proficient with design software and statistical analysis tools
Nice to have
- Expertise in DRAM product development (DDRx, GDDRx, LPDDRx, HBMx, etc.)
- Strong experience in DRAM I/O interfaces and SERDES
- Proficiency in DRAM full chip functional verification
- Comprehensive understanding of ASIC design flow including RTL design, verification, logic synthesis and timing analysis
- Demonstrated track record of innovation and creativity in problem solving
What you get
- Medical/Dental/Vision/401k
- 4+ weeks of paid time off a year, plus holidays and sick leave
- Stipend for fertility care or adoption, medical travel support, and virtual vet care
- On-demand apps and free confidential therapy sessions
- Onsite Café and gym, plus virtual classes
- Flexible work environment
Worth weighing
- Daily onsite presence required in San Jose office
- No specific mention of the technology stack used
- High application volume may limit candidate experience
Summarised from Samsung Semiconductor's posting. Read the full original.
Listed by Samsung Semiconductor on their greenhouse job board, last confirmed open on 2026-10-23. PitchMeAI is not the employer.
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