Senior Engineer, Physical Design AI/ML
Samsung Semiconductor · San Jose, California, United States
Posted 16 days ago
or apply directly on Samsung Semiconductor's site. We never take the application ourselves.
Is this posting real?
- This role has been open
- 16 days Samsung Semiconductor's roles stay open a median of 44 days
- Reposted
- No
- Salary listed
- No 0% of Samsung Semiconductor's roles list one
- Ghost-job risk at Samsung Semiconductor
- high 34 stale, 1 reposted of 69 open
- Hiring momentum
- 93 roles opened in the last 90 days ↑ up vs. the prior 90 days
- Last confirmed on the employer's board
- 2026-09-17
Measured from postings appearing on and disappearing from Samsung Semiconductor's own greenhouse board since 2026-08-03. Full hiring picture for Samsung Semiconductor.
About this role
The Senior Engineer in the Logic Pathfinding Lab will focus on applying AI and machine learning tools to enhance design simulation accuracy and optimize chip layout designs. Responsibilities include researching new device architectures, automating design implementation and verification steps, and collaborating with team members to develop advanced technology options for sub-2nm technology nodes.
- benefits
- 3/5
- freshness
- 4/5
- career value
- 5/5
- role clarity
- 5/5
- pay transparency
- 0/5
Scored from the posting itself — how clearly the role is described, how much it says about pay and benefits, and how recently it was listed. Not a judgement of Samsung Semiconductor as an employer.
What you need
- PhD with industry experience preferred
- RTL synthesis, place and route, and timing analysis skills
- Understanding of clock and power delivery network schemes
- Hands-on experience on machine learning or deep learning projects for scientific and/or engineering applications
- Strong Python and/or C++ skills, including expertise in machine learning packages like PyTorch and Tensorflow
- Experience in using Bayesian optimization and/or active learning frameworks for design space exploration
Nice to have
- Familiarity with state-of-the-art AI workloads and their compute and memory requirements
- Experience with setting up and optimization of a local, private, compute cluster to run latest LLM models
- Proficiency in EDA tools for synthesis and layout
- Prior experience using generative AI for chip design/optimization
What you get
- Medical/Dental/Vision/401k
- 4+ weeks of paid time off a year, plus holidays and sick leave
- Stipend for fertility care or adoption, medical travel support, and virtual vet care
- On-demand apps and free confidential therapy sessions
- Onsite Café and gym, plus virtual classes
- Flexible work environment
Worth weighing
- Daily onsite presence required in San Jose
- No specific salary figure provided, only a range
- High application volume may limit candidate experience
Summarised from Samsung Semiconductor's posting. Read the full original.
Listed by Samsung Semiconductor on their greenhouse job board, last confirmed open on 2026-09-17. PitchMeAI is not the employer.
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