Senior Hardware Design Engineer
SambaNova Systems · Austin, Texas, United States; San Jose, California, United States
Posted 29 days ago
or apply directly on SambaNova Systems's site. We never take the application ourselves.
Is this posting real?
- This role has been open
- 29 days SambaNova Systems's roles stay open a median of 33 days
- Reposted
- No
- Salary listed
- No 0% of SambaNova Systems's roles list one
- Ghost-job risk at SambaNova Systems
- high 21 stale, 2 reposted of 57 open
- Hiring momentum
- 68 roles opened in the last 90 days ↑ up vs. the prior 90 days
- Last confirmed on the employer's board
- 2026-09-17
Measured from postings appearing on and disappearing from SambaNova Systems's own greenhouse board since 2026-08-03. Full hiring picture for SambaNova Systems.
About this role
The Senior Hardware Design Engineer at SambaNova will design component units of the Reconfigurable Dataflow Unit (RDU) ASICs for AI workload acceleration systems. Responsibilities include authoring microarchitecture specifications, coding and debugging SystemVerilog RTL, meeting Power, Performance, and Area (PPA) targets, and collaborating with various engineering teams throughout the chip implementation and production lifecycle. This role requires ownership of design blocks from implementation through to silicon bring-up, contributing to innovative hardware features.
- benefits
- 5/5
- freshness
- 4/5
- career value
- 4/5
- role clarity
- 5/5
- pay transparency
- 0/5
Scored from the posting itself — how clearly the role is described, how much it says about pay and benefits, and how recently it was listed. Not a judgement of SambaNova Systems as an employer.
What you need
- Master's degree in Computer Engineering or Electrical Engineering with 3–5 years of relevant experience, or Bachelor's degree with 5–7 years
- Solid foundation in computer architecture and digital logic design
- Strong SystemVerilog RTL design skills for high-speed, high-performance ASICs
- Experience making design decisions that trade off Power, Performance, and Area (PPA)
- Working knowledge of industry-standard interconnects and protocols (e.g., AXI, PCIe, Ethernet, HBM/DDR)
- Experience with digital logic synthesis tools and Static Timing Analysis (STA)
Nice to have
- Exposure to a full ASIC development cycle through tapeout and production silicon
- Interest in or knowledge of AI workload acceleration techniques
- Experience with low-power design techniques (clock gating, DVFS) at advanced process nodes
- Exposure to emulation or FPGA prototyping platforms for pre-silicon validation
What you get
- Competitive total rewards package including base salary and equity
- 95% premium coverage for employee medical insurance
- 77% premium coverage for dependents
- Health Savings Account (HSA) with employer contribution
- Dental and Vision insurance
- Short/Long term Disability insurance
Worth weighing
- Onsite work required in either San Jose, CA or Austin, TX
- Base salary range is broad ($120,000 — $200,000 USD) which may indicate variability in experience or negotiation
- Role involves debugging own designs in silicon, which may require significant responsibility and ownership
Summarised from SambaNova Systems's posting. Read the full original.
Listed by SambaNova Systems on their greenhouse job board, last confirmed open on 2026-09-17. PitchMeAI is not the employer.
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