Avionics FPGA Engineer
Lodestar · London, United Kingdom
Posted about a month ago · Previously reposted
or apply directly on Lodestar's site. We never take the application ourselves.
Is this posting real?
- This role has been open
- 44 days Lodestar's roles stay open a median of 42 days
- Reposted
- Yes taken down and listed again at least once
- Salary listed
- No 60% of Lodestar's roles list one
- Ghost-job risk at Lodestar
- moderate 2 stale, 2 reposted of 10 open
- Hiring momentum
- 12 roles opened in the last 90 days ↑ up vs. the prior 90 days
- Last confirmed on the employer's board
- 2026-09-26
Measured from postings appearing on and disappearing from Lodestar's own greenhouse board since 2026-08-03. Full hiring picture for Lodestar.
About this role
As an Avionics FPGA Engineer at Lodestar, you will design, implement, and validate advanced avionics architectures for autonomous space systems. Your role will involve working hands-on throughout the entire lifecycle of projects, from concept and simulation to hardware testing and ensuring on-orbit readiness. You will collaborate with various teams to integrate your designs into flight systems and contribute to documentation and testing processes.
- benefits
- 3/5
- freshness
- 5/5
- career value
- 4/5
- role clarity
- 4/5
- pay transparency
- 0/5
Scored from the posting itself — how clearly the role is described, how much it says about pay and benefits, and how recently it was listed. Not a judgement of Lodestar as an employer.
What you need
- BEng / MEng in Electrical Engineering or a related field, or equivalent experience
- Proficiency in SystemVerilog and/or Verilog
- Hands-on experience with at least one FPGA family or ecosystem
- Familiarity with common digital interfaces and protocols (SPI, I2C, UART)
- Experience with simulation and formal verification
- Experience dealing with clock domain crossings, static timing analysis and timing closure
Nice to have
- High speed interfaces: MIPI-CSI, QSGMII, SGMII, 10GBASE-KR, PCIe or similar
- Memory interfaces: DDR3, DDR4, LPDDR4 or similar
- SoC design: integrating RISC-V or Arm processor subsystems, AXI/APB/AHB protocols, and embedded Linux bring-up
- Experience with PCB design for high speed digital designs
- Strong knowledge of verification methodologies, functional coverage, assertions and constrained random verification
What you get
- Pay Range: (E1) Junior Engineer: £30,000 - £55,000 / year, (E2) Mid-level Engineer: £55,000 - £75,000 / year
- Meaningful equity incentives as part of our employee option pool
- 28 Days Annual Leave
- Comprehensive medical, dental & vision coverage
- Contributory pension
Worth weighing
- Background checks required for security reasons, including nationality checks due to ITAR regulations
- Citizenship restrictions apply for eligibility to access regulated equipment and data
- Compensation bands vary based on individual skills, education, experience, and internal equity
Summarised from Lodestar's posting. Read the full original.
Listed by Lodestar on their greenhouse job board, last confirmed open on 2026-09-26. PitchMeAI is not the employer.
More roles at Lodestar
- Software Engineer I: Payload EngineerLos Angeles, US
- Avionics Hardware EngineerLondon, United Kingdom
- Avionics Software EngineerLondon, United Kingdom
- Technical Proposal WriterLos Angeles, US
- Software Engineer I: PerceptionLos Angeles, US
- Software Engineer I or II: State Estimation & PredictionLos Angeles, US
- Software Engineer I,II,III: SimulationsLos Angeles, US