Senior ASIC Physical Design Engineer
K2 Space · United States - Remote
Posted about 3 months ago · $170,000 – $250,000
or apply directly on K2 Space 's site. We never take the application ourselves.
Is this posting real?
- This role has been open
- 81 days K2 Space 's roles stay open a median of 81 days
- Reposted
- No
- Salary listed
- Yes 78% of K2 Space 's roles list one
- Ghost-job risk at K2 Space
- high 217 stale, 0 reposted of 220 open
- Hiring momentum
- 244 roles opened in the last 90 days ↑ up vs. the prior 90 days
- Last confirmed on the employer's board
- 2026-10-23
Measured from postings appearing on and disappearing from K2 Space 's own greenhouse board since 2026-08-03. Full hiring picture for K2 Space .
About this role
The Senior ASIC Physical Design Engineer will be responsible for implementing advanced SoCs for next-generation satellite and space systems. This role involves executing the full physical design flow, collaborating with various teams to achieve timing closure, optimizing power, performance, and area (PPA), and supporting design integration with external partners. The engineer will also develop new SoC sub-systems for satellite communications and contribute to cutting-edge SoCs that will be deployed in space.
- benefits
- 1/5
- freshness
- 1/5
- career value
- 5/5
- role clarity
- 5/5
- pay transparency
- 5/5
Scored from the posting itself — how clearly the role is described, how much it says about pay and benefits, and how recently it was listed. Not a judgement of K2 Space as an employer.
What you need
- Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, or related field
- 5–10 years of experience in ASIC physical design for complex SoCs
- Hands-on experience with industry-standard tools (Synopsys ICC2/Fusion Compiler, Cadence Innovus, or equivalent)
- Strong understanding of timing analysis, power optimization, and physical verification flows
- Experience with hierarchical or flat SoC design methodologies
- Familiarity with FinFET technologies
Nice to have
- Exposure to radiation-hardened or space-qualified ASICs
- Experience with chip-package co-design or advanced packaging (2.5D/3D)
- Familiarity with physical design service vendor management or offshore collaboration
- Experience with sign-off through TSMC
- Experience with Gate-All-Around technologies
What you get
- Base salary range for this role is $170,000 – $250,000 + equity in the company
- Comprehensive benefits package including paid time off, medical/dental/vision coverage, life insurance, paid parental leave, and many other perks
Worth weighing
- No specific mention of remote work policies beyond the location being remote
- Salary is based on several factors, which may lead to variability in offers
- The role involves working with external partners and service providers, which may introduce complexities in collaboration
Summarised from K2 Space 's posting. Read the full original.
Listed by K2 Space on their greenhouse job board, last confirmed open on 2026-10-23. PitchMeAI is not the employer.
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