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Jane Street

ASIC Physical Design Engineer

Jane Street · New York, New York, United States

Posted about 2 months ago

or apply directly on Jane Street's site. We never take the application ourselves.

Is this posting real?

This role has been open
56 days
Jane Street's roles stay open a median of 56 days
Reposted
No
Salary listed
No
0% of Jane Street's roles list one
Ghost-job risk at Jane Street
high
210 stale, 2 reposted of 234 open
Hiring momentum
261 roles opened in the last 90 days
↑ up vs. the prior 90 days
Last confirmed on the employer's board
2026-09-28

Measured from postings appearing on and disappearing from Jane Street's own greenhouse board since 2026-08-03. Full hiring picture for Jane Street.

About this role

The ASIC Physical Design Engineer will work within a small Ultra Low Latency team, collaborating across various areas such as trading and research infrastructure. This role involves leading physical design efforts while also engaging with RTL design, requiring an end-to-end ownership of the physical design flow and an understanding of how design decisions impact the overall chip. Candidates should be open to using software engineering techniques to enhance hardware design processes.

Our read on this posting2.0out of 5
benefits
1/5
freshness
1/5
career value
4/5
role clarity
4/5
pay transparency
0/5

Scored from the posting itself — how clearly the role is described, how much it says about pay and benefits, and how recently it was listed. Not a judgement of Jane Street as an employer.

What you need

  • 8+ years hands-on experience building and running modern physical design flows (e.g., floor planning, place and route, timing closure, physical verification, power analysis)
  • Ability to read and write RTL
  • Experience in thinking about physical design in the context of the overall chip
  • Interest in using software engineering techniques to improve hardware design processes
  • Experience programming in a high-level language (Python, C++, Haskell, etc.)

Worth weighing

  • This role is not traditional PD; it requires a broader skill set including RTL design and an understanding of the entire chip design process.
  • Candidates who have only worked in PD may not find this position suitable.
  • The company emphasizes the use of tools to improve hardware engineering, which may appeal to those interested in software integration.
  • No specific benefits or compensation details are mentioned in the posting.

Summarised from Jane Street's posting. Read the full original.

Listed by Jane Street on their greenhouse job board, last confirmed open on 2026-09-28. PitchMeAI is not the employer.

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